Design of 16-Bit CPU and its Application for Computer Arithmetics

Abstract

In this paper, a novel design present, as there aretraditionally two ways to implement any computation, one is using general purpose processor and the other one is dedicated IC, each one has extreme design metrics. General purpose processor (GPP) is highly flexible, consumes more power and work at slow rates, where ASIC results highest speed, lowest power consumption.However, since ASIC computation is very expensive, FPGA realization of GPP is considered in this work and the Morris Mano Computer (MMC) designed. In this project a novel designed, a 16-bit CPU called Morris Mano Computer (MMC), which consists of an ALU unit, control unit, memory and common bus and associated glue logic. It is implemented in Verilog RTL (Register Transfer Language). It is verified in Modelsim HDL (Hardware Description Language) an event driven simulator for functional correctness by writing Verilogtest benches. Synthesis, implementation is done in Xilinx Vivado.The Xilinx ZYNQ based zed board is used to implement our design. A few real life application in computer arithmetic likeAddition of two numbers, Branching instructions, logical Anding,1’s complement subtractor, 2’s complement subtractor, and Multiplication are developed. The Assembly level language (ASM) are developed for designed Morris Mano Computer (MMC). A clock frequency of 100MHz is applied to the MMC core and all the arithmetic ASM are executed and noted down no.of ASM instruction, no.of clock cycle and associated delays in each case, and relative analysis of results are performed.