A Low Power 15T SRAM Cell Design Based on FinFET, CNTFET and GNRFET under 20nm Processing Technology

Abstract

FinFET (Fin Field Effect Transistor), CNTFET (Carbon Nano-Tube Field Effect Transistor) and GNRFET (Graphene Nano-Ribbon Field Effect Transistor) are the most emerging device technologies for extending Moore's law, an important benchmark in the field of Electronics and Information processing. Scaling down the length towards the nanometer regime helps to extend the saturating Moore's law. Recent circuit simulation works with FinFET and GNRFET which proclaim their potential in low power applications and offer a promising solution to the problems like sub-threshold leakage and poor short channel effects in planar MOSFET. All the technology offers improvised carrier mobility property and area efficiency. Meanwhile, memory storage has become an important criterion in various applications and in early works, SRAM using MOSFET technology was designed for embedded memory which lags in parametric performances, poor carrier transportation, and several submicron issues. In this work, a 15T SRAM cell is proposed using FinFET (20nm), CNTFET (20nm) and GNRFET (20nm) technology and their performance metrics like area, power, and delay are compared and analyzed. The proposed SRAM design occupied minimum power (24.28µW), delay (13.92ps) and current (18.71µA) which is improved than conventional 6T, 8T, 9T SRAM design.